When an integrated device product (e.g., packaged silicon/die) is loaded into a tester for platform environment docked to an optical backside tool (e.g., Infrared Emission (IREM) device, Time Resolved Emission (TRE) device, Laser Assisted Device Alteration (LADA) device, Laser Voltage Probing (LVP) device, Laser Stimulated Emission Detection (LSTED) device) and imaged through the backside to perform optical probing, the orientation of the product may influence the ability to align the product and pinpoint devices for debugging. The alignment difficulties may be the result of asymmetric circuit layouts.
The asymmetric circuit layout can cause illuminated light to be preferably absorbed and partially reflected while in one orientation, and fully reflected while in another orientation, degrading both the contrast and resolution of the resulting image if not properly corrected. If the product is oriented 90 from the optimal position, the imaging of the integrated device structures may be obscured creating a localization and data acquisition gap in performance of the optical tool.